Three-phase three-level npc inverter controlled by dsp card
Corressponding author's email:
tridd@hcmute.edu.vnKeywords:
SFO PWM, SPWM, THD, PWM, switching reductionAbstract
This paper presents experimental model of a three-phase, three-level NPC inverter. This multilevel inverter helps achieve higher electrical power by connecting in series the power semiconductor switches with lower voltage DC sources to produce step-waveform AC output. Accordingly, the generated 3-level phase voltage has higher quality than the phase voltage produced by the traditional 2-level inverter configuration does, such as less reverse voltage on switch power, lower voltage increasing speed on switch and higher number of switching in a cycle and less total harmonic distortion THD%. With 27 states of switching in comparison with only 8 states in the 2-level structure, 3-level inverter configuration shows more control flexibility for more different requirements in practice. This paper focuses on the new achieve- ments by the 3-level inverter which is built up basing on SFO PWM technique. Simulation and experimental results are provided in order to validate the proposed method.
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