A novel offset functions design for five-level cascade inverters to reduce switching loss

Authors

  • Duc Tri Do Ho Chi Minh City University of Technology and Education, Vietnam
  • Thanh Hai Quach Ho Chi Minh City University of Technology and Education, Vietnam

Corressponding author's email:

haiqt@hcmute.edu.vn

Keywords:

Carrier based pulse width modulation, offset function, reducing the number of switching losses, Cascade inverter, five-level

Abstract

This paper presents a new pulse width modulator control method using the offset function to reduce switching loss in five-level Cascade inverter. The proposed technique is based on the offset function being 3rd harmonic voltage. The offset voltage will be added to the control voltages so that the voltage of phase which has absolute of load current largest move into top or bottom of the carriers. So reducing the intersection of control voltage in that phase and the carriers and then reducing the number of switching losses. With the proposed PWM control method, switching loss in a cycle will be decreased. The results of simulations and experiments are provided in order to validate the proposed method. Theoretical, total switching losses applying the proposed technique are 33% lower than standard sine PWM technique. Simulation and empirical results show that applying the proposed algorithm is feasible and meets the ME standards.

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References

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Published

28-09-2018

How to Cite

[1]
D. T. Do and T. H. Quach, “A novel offset functions design for five-level cascade inverters to reduce switching loss”, JTE, vol. 13, no. 5, pp. 20–26, Sep. 2018.

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Research Article

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