Balancing capacitor voltage in three-level NPC converter

Authors

  • Minh Tam Nguyen Trường Đại học Sư phạm Kỹ thuật Thành phố Hồ Chí Minh
  • Duc Tri Do Trường Đại học Sư phạm Kỹ thuật Thành phố Hồ Chí Minh
  • Duy Tien Hua Trường Đại học Sư phạm Kỹ thuật Thành phố Hồ Chí Minh
  • Thi Bich Nga Truong Trường Đại học Sư phạm Kỹ thuật Thành phố Hồ Chí Minh

Corressponding author's email:

tridd@hcmute.edu.vn

Keywords:

Neutral point diode clamped converter, offset, modulation index, THD, Three levels

Abstract

This paper presents a solutionfor balancing capacitor voltage of a three-level NPC inverter by controlling DC-link in capacitors. When the capacitor’s voltage varies, it should be stabilized at zero in order to not create imbalance in the system. The imbalance of capacitor’s voltage will cause unexpected lower harmonic. On the other hand, when capacitor’s voltage was balanced, the center source phase DC voltage will be better than when the inverter configuration works in imbalance mode. This paper uses the method that firstly checking current direction on the power line in the capacitor, then accordingly controlling switches for capacitor voltage balance. Simulation and experimental results are provided in order to validate the proposed method.

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References

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Published

28-12-2016

How to Cite

[1]
M. T. Nguyen, Đức T. Do, D. T. Hua, and T. B. N. Truong, “Balancing capacitor voltage in three-level NPC converter ”, JTE, vol. 11, no. 4, pp. 29–36, Dec. 2016.

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